test pattern

美 　英

• na.【影視】測試圖
• 網(wǎng)絡(luò)測試模式；測試圖形；測試資料

詞形變化

復(fù)數(shù)：test patterns  

英漢解釋

na.	1. 【影視】測試圖

英英解釋

n.	1. a pattern of lines and colors that you see on your television screen when there are no programs

例句

PLUGE pattern is a test pattern used to calibrate the black level on a display monitor to that of a DVD player, a VCR, or some other source.

PLUGE圖案可以對接入顯示器的DVD播放機、盒式磁帶錄像機（VCR）或其它視頻輸入設(shè)備進行暗電平校正。

This paper studies the crosstalk fault and its methods of test pattern generation in high-speed interconnect circuits.

本論文針對高速互連電路串?dāng)_型故障及測試生成方法進行研究。

Define test methodology (SCAN, BIST, JTAG etc. ) for the entire chip. Test pattern generation and optimization.

制定芯片整體測試方法（SCAN，BIST，JTAG等）。制定和優(yōu)化測試模式。

First, establish test pattern between among checkpoints with BP neural network technique.

首先，利用BP神經(jīng)網(wǎng)絡(luò)建立了點與點之間的測試模型。

Many scholars and teachers have been questioning this rigid test pattern.

很多專家老師都對這種僵硬的測試模式提出了質(zhì)疑。

and (6) carrying out the test pattern for completing the test working.

執(zhí)行測試圖形，完成測試工作。

The Model 7001 Switch System switches the electrometer and voltage source to each test pattern, X1 through X10.

7001型開關(guān)系統(tǒng)將靜電計和電壓源切換到每個對象，X1到X10。

How to generate CPU test pattern efficiently is a big problem to people who write the test program.

如何科學(xué)有效地生成CPU測試圖形，是困擾測試程序開發(fā)人員的一個難題。

For example, you can code a load test plug-in to set or modify the load test pattern while the load test is running.

例如，可以編寫負載測試插件代碼，以便在負載測試運行過程中設(shè)置或修改負載測試模式。

arranging the signal variation time of each pin based on the time sequence information of each pin to obtain a test pattern;

根據(jù)各個管腳的時序信息設(shè)置各個管腳信號變化的時間，得出測試圖形；

Register assignment algorithm targeting automatic test pattern generation

基于自動測試生成的寄存器分配算法

Correction of pixel ratio and its application in the generation of definition test pattern

像素比例校正及其在生成清晰度測試圖中的應(yīng)用

State Coverage Enhancement Considering Inside Branches and Test Pattern Generation

覆蓋狀態(tài)內(nèi)部分枝的測試向量生成

Parallel Test Pattern Based Fault Simulation Method for Synchronous Sequential Circuit

基于測試碼并行的同步時序電路故障模擬方法

Delay Test Pattern Generation Considering Crosstalk-induced Effects

考慮串擾影響的時延測試

Ant Path Searching Algorithm for Automatic Test Pattern Generation of Sequential Circuit

基于螞蟻路徑的時序電路故障診斷算法

Automatic obtaining current measure't value, defect XY address, test pattern and gray scale data

從測試裝置自動讀取電流值，點缺陷坐標(biāo)，顯示圖形，灰度數(shù)據(jù)

An Approach to Automatic Test Pattern Generation Using Chaotic Neural Networks

一種基于混沌神經(jīng)網(wǎng)絡(luò)的自動測試生成算法

Principles of gated circuit automation test pattern generation

門級電路自動測試向量生成技術(shù)原理

Automatic Test Pattern Generation Based on Particle Swarm Optimization Algorithm for Sequential Circuits

基于粒子群算法的時序電路測試生成

New Built-in-Self-Test Technique for Generating Deterministic Test Pattern

生成確定性測試圖形的內(nèi)建自測試方法

Testbench of PCI Target Device Interface and Test Pattern Generation

PCI總線接口的驗證平臺及測試圖形生成

generation, automatic test pattern (ATPG)

自動化測試模式產(chǎn)生

Generation of Reseeding Test Pattern with Variable Length

變長重復(fù)播種測試碼生成方法

Auto-Generation of Universal Test Pattern for FPGA Logic Resources

FPGA邏輯資源測試圖形自動生成方法

Test Pattern Auto-generating for Fault Diagnosis of Digital PCB

數(shù)字電路板故障診斷測試數(shù)據(jù)自動生成

Test Pattern Generation in Built-In Self-Test with Multiple Scan Chains

基于多掃描鏈的內(nèi)建自測試技術(shù)中的測試向量生成

Exact Solution to the Maximal Compact Test Pattern

壓縮測試向量的準確求法

The Reduction of Sequence Circuit Test Pattern

時序電路測試向量的壓縮

Test Pattern of Microchannel Cooler

微通道冷卻器的測試技術(shù)

Method of Maximal Compaction Test Pattern

測試向量最大壓縮技術(shù)

Test Pattern Artwork and Sample Preparation for Underwriters Laboratories Standards UL 796 and UL 746

保險商實驗室標(biāo)準UL796和UL746試驗模型工藝和試樣制備

Automatic Test Pattern Generation Model System Based on Neural Networks

組合電路測試生成的神經(jīng)網(wǎng)絡(luò)建模研究與實現(xiàn)

TPG test pattern image generator

測試圖形信號發(fā)生器

Speedup Generation Method for Test Pattern Based on BDD Learning

用二叉決策圖學(xué)習(xí)加速測試模式生成